Intel maps denser EMIB packages and glass-based designs

The roadmap points to bigger multi-chiplet systems with tighter interconnects and stronger power delivery, extending EMIB into larger package classes.

Intel’s advanced packaging roadmap shows EMIB and Foveros moving toward larger, denser multi-chiplet systems, with EMIB expected to stretch from today’s organic-substrate packages to bigger SiPs and eventually glass-based packages. The roadmap calls for smaller FLI bump pitches, from 55 µm in first-generation EMIB to 45 µm, then around 36 µm, then 25 µm and below, while also increasing bridge counts and package scale. Intel is also adding bridge features such as EMIB-M’s MIM capacitors and EMIB-T’s TSVs to improve power delivery and reduce impedance and noise for large processors and HBM-heavy designs. The company’s table places EMIB-T in 2028, with EMIB-T evo and EMIB-T glass later, and says the long-term aim is system-in-packages as large as 12 reticles.